Workshop on Day 0

We have again Workshops on Day 0 – Tuesday 4 February:

Note that FPGA-forum workshops are handled 100% by each workshop organiser.

Workshop 1: Security in FPGA based systems…

Time: 4 February: TBD

A deep dive in security concepts

By Tony Cartolano, Altera

Registration and more info:  https://forms.office.com/r/6qvw37F6BH

Workshop 2: Build your RISC-V system on a Low Power FPGA

Time: 4 February: 12:30-16:30

Learn how to build and program your RISC-V processor system with Lattice Radiant and Propel Tools on free Certux-NX Low Power CRUVI board. When all up and running you can take the board with you and continue you company design at work

By Matt Holdsworth and René Kappel Jensen

Registration and more info: https://forms.office.com/r/PNJmnGVLzw

Important Opening Keynote at FPGA-forum 2025

Security is critical for any modern embedded system – and thus also for FPGAs, – but FPGAs could also be the key to better embedded systems security.
For FPGA-forum 2025 we wanted an opening keynote on FPGA and Security, and this is a very welcome result of that request.
(See also article in Elektronikknett – in Norwegian.)

FPGAAIPQCCRABBQ, or How to Decode (Survive?) The Cyber Storm

Presented by Anthony Cartolano, Altera FPGA Security Expert

Cybersecurity has captured headlines with an alarming increase in frequency. Between AI, quantum computers, software platforms, and government inquiries, it has been difficult to avoid daily disruptions, much less complete a reasonable product development cycle. In this talk, we’ll examine how recent trends, including artificial intelligence, post-quantum cryptography and more are placing incredible demands on product designers. We’ll show how and why FPGAs are uniquely suited to help designers both survive the current storm of rapidly changing requirements and prepare to respond to challenges throughout their lifecycle. Finally, we’ll discuss how FPGAs are already prepared to meet the requirements of the Cyber Resilience Act.

FPGA-forum 2025 – The date is set

FPGA-forum 2025 will be Wednesday-Thursday 5-6 February.

Reserve the dates in your calendar allready now, and if you allready have some ideas for a presentation at this event, send us an email, We are ready to receive 🙂

The Opening Keynote will be on a subject that is important for almost everybody. This will be published very soon.

Exciting Opening Keynote for FPGA-forum 2024

 FPGA-forum has succeeded in getting a very interesting opening keynote for FPGA.forum in February.  Michaela Blott is a senior Fellow at AMD and a major expert on FPGA and AI. This opening keynote will be of great interest to the FPGA community - and really anyone who finds embedded AI exciting. 

See article in Elektronikknett in Norwegian.

Opening Keynote:
Pervasive and Sustainable AI with Adaptive Computing

In the context of AI, we face a plethora of challenges that extend beyond the widely discussed performance scalability required to meet the growing demands of compute and storage in the latest models. These challenges encompass sustainability, pervasiveness, agility, and diversity, all of which are needed to cater to a constantly evolving range of applications and algorithms from endpoint to edge and cloud. In this talk, we explore how adaptive devices and agile compiler stacks can provide solutions by delivering post-production hardware specialization and co-designed algorithms. This results in highly optimized AI systems which not only provide the necessary performance scalability but also bring a reduction in carbon footprint while addressing the needs of a broad range of diverse applications with the necessary agility.

Michaela Blott - Ireland | Professional Profile | LinkedIn

Bio

Michaela Blott is a Senior Fellow at AMD Research. She heads a team of international scientists driving exciting research in computer architectures for AI, green AI and agile compiler stacks. She earned a PhD from Trinity College Dublin and her Master’s degree from the University of Kaiserslautern, Germany, and brings over 25 years of experience in leading-edge computer architecture and advanced FPGA and board design, in research institutions (ETH Zurich and Bell Labs) and development organizations. She is highly active in the research community as industrial advisor to numerous EU projects and research centres, serves on technical program committees, and received a number of Women in Tech Awards.