Keynote 2020: FPGA Verification Maturity: A Quantitative Analysis

Harry Foster, Chief Scientist Verification for the IC Verification Solutions division of Mentor, A Siemens Business, will present:

FPGA Verification Maturity: A Quantitative Analysis

on Wednesday morning, February 12, 2020.

Abstract:
While multiple studies on IC/ASIC functional verification trends have been published, there have been no studies specifically focused on FPGA verification trends. To address this dearth of information, Harry presents the results from a recent large industry study on functional verification. The findings from this study provide invaluable insight into the state of today’s FPGA market in terms of both design and verification trends. What is unique about this study is that for the first time the impact of this growing complexity has been quantified in terms verification effectiveness and effort.

Bio:
Harry Foster is Chief Scientist Verification for the IC Verification Solutions division of Mentor, A Siemens Business; and is the Co-Founder and Executive Editor for the Verification Academy. He holds multiple patents in verification and has co-authored six books on verification. He was the 2006 recipient of the Accellera Technical Excellence Award for his contributions to developing industry standards, and was the original creator of the Accellera Open Verification Library (OVL) standard. Harry serves on the Design Automation Conference (DAC) executive committee, and is the 2020 DAC Vice Chair.